Balancing efficiency and flexibility for DNN acceleration via temporal GPU-systolic array integration
Published in DAC 20, 2020
Posts by Collection
publications
TPUSim: ISA Design and Optimization for Fused Architecture Based Training Accelerator
Published in DAC 20, Poster, 2020
Characterizing and Demystifying the Implicit Convolution Algorithm on Commercial Matrix-Multiplication Accelerators
Published in IISWC 21, 2021
Efficient Activation Quantization via Adaptive Rounding Border for Post-Training Quantization
Published in Arvix, 2022
uGrapher: High-performance Graph Operator Computation via Unified Abstraction for Graph Neural Networks
Published in ASPLOS 23, 2022
AdaptGear: Accelerating GNN Training via Adaptive Subgraph-Level Kernels on GPUs
Published in CF 23, 2023
DistSim: A performance model of large-scale hybrid distributed DNN training
Published in CF 23, 2023
AlphaCu: A Transformation-Driven Synthesis Framework for LLM-Based GPU Kernel Generation
Published in ASE 26, 2026
GPU-Tile-Sim: A Tile-Centric GPU Simulation Framework for LLM Hardware-Software Co-Design
Published in MICRO 26, 2026
STRIDE: Efficient Secure Transformer Inference via Inter-Operator Protocol and Operator Co-Design
Published in ATC 26, 2026
Zhengyi Li^, Yangjie Zhou^, Zihan Liu, Ziyu Xiao, Kang Yang, Jiaping Gui, Yu Feng, Yun Lin, Jin Song Dong, Yu Yu, Minyi Guo, Ning Liu, Jingwen Leng (^Co-first authors)
teaching
Teaching experience 1
Undergraduate course, University 1, Department, 2014
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Teaching experience 2
Workshop, University 1, Department, 2015
This is a description of a teaching experience. You can use markdown like any other post.